InstructorSteven Swanson
Office: EBU3B 3212 Office Hours: Tuesday 1-2pm; Friday 10-11am UCSD homepage Teaching AssistantsRaid Ayoub
Office Hours: Tu 12:30 - 2:30 + We 11:00 am - 1:00 pm Joe Auricchio
Office Hours: Tuesday 6-8:30, Wednesday 6-8:30, Thursday 6-9 Course discussion board: cse141L. Required reading. Get signed up. |
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This is the labratory class associatied with cse141: Introduction to Computer Architecture. Over the course of the quarter, you will design a processor that implements an insturction set of your own design. It will provide you the chance to grapple first-hand with the issues of processor design.
Unless you have discussed it with you me, you should be in enrolled in both 141 and 141L.
There are two ways to get an "A" in this class. One is to implement a working processor by the end of the quarter that executes programs in an ISA of your design. This is the grading option you should strive for.
The other way is to do well on the labs. If your processor doesn't turn out as well, I will consider your performance on the labs and web board posting (see below). Your grade will be at least the maximum of the "your processor works" grade and the lab assignment grade.
In addition to the labs, you must post the web board at least twice per week. The tools are challenging and sometimes buggy. Your classmates (in addition to the coures staff) are an excellent resource for help with the tools.
Calculating grades I compute the lab grades using an Excel spread sheet. In the interests of transparancy, the current grade sheet (with identifying information removed) is avaiable here. The grade sheet contains all the information about curves and how the grades are computed. It is somewhat sophisticated, if you find bugs please bring them to my attention.
| Labs | 85% | One lab per week. |
| Postings to the class web board | 15% | Post at least twice per week |
Items in the schedule more that one week in the future are subject to
change. Check back for updates for the assigned readings, etc. The date
for the midterm will not change, however. Nor will deadlines for
homeworks/projecsts that
I will post the slides for most lectures. Since the slides contain material I am not allowed to distribute publically, they are only available from on campus or via the campus proxy. Instructions for setting up the proxy can be found here. Using the proxy is useful in general, since it gives you full access to the libraries and other resources from off campus.
| Date | Topic | Readings | Slides | Due | Notes |
|---|---|---|---|---|---|
| Friday, January 11 | Administrivia; Overview of the course; Lab 1 assigned; Verilog I | TBA | slides , slides | ||
| Monday, January 14 | |||||
| Friday, January 18 | Lab 1 review; Lab 2 assigned; Verilog II | TBA | slides , slides | Project 1; | |
| Friday, January 25 | Lab 2 review; Lab 3 assigned | TBA | Project 2; | ||
| Friday, February 1 | Lab 3 review; Lab 4 assigned | TBA | Project 3; | ||
| Friday, February 8 | Lab 4 review; Lab 5 assigned | TBA | slides | ||
| Friday, February 15 | Lab 5 review; Lab 6 assigned | TBA | Project 5; | ||
| Friday, February 22 | Lab 6 review; Lab 7 assigned | TBA | |||
| Friday, February 29 | Lab 7 review; Lab 8 assigned | TBA | |||
| Friday, March 7 | Lab 8 update | TBA | |||
| Friday, March 14 | Lab 8 review; Wrap up | TBA | |||
| Monday, March 17 | Awards and Pizza! | TBA | foo | Project 7; |