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                       Nick Mitchell


                       Department of Computer Science and Engineering
                       University of California, San Diego
                       9500 Gilman Drive
                       La Jolla, CA 92093-0114
                       Telephone: (858) 822-2269, Fax: (858) 534-7029
                       Email: mitchell@cs.ucsd.edu
                       Web: http://www.cs.ucsd.edu/"mitchell
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Education

                 Ph.D. University of California, San Diego
       expected 8/2000 Computer Science

                  M.S. University of California, San Diego
                  1996 Computer Science

                  B.S. University of California, Berkeley, with honors
                  1994 Computer Science major, Physics minor


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Research Interests

    o Contingency-aware cost evaluation.

    o Semi-static and dynamic program optimization.

    o Evaluation of, and optimization for, multi-threaded architectures.

    o Performance understanding tools.


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Thesis Summary

 Compilers should produce programs which handle contingencies. For
 example, whether we apply an optimization, or how we parameterize the
 optimize may be contingent upon the size or properties of the input
 data set, or properties of the architecture. A contingency-aware
 program reacts to information that was either not analyzable, or not
 knowable at compile time.

 However, typical memory-hierarchy optimizations, such as tiling,
 either ignore programs with contingencies (by restricting themselves
 to a small set of constructs), or, overlook the contingencies
 themselves (by assuming the content of unknowable information).

 I propose that optimization in spite of contingencies requires new
 analyses, and a model of performance which is minimally restrictive
 and blurs the compile-time/run-time boundary. I introduce one such
 analysis, bucket tiling, and a modal model of memory hierarchy
 performance.

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Publications

                     [1] Tiling for Non-affine Array References, Nick
                         Mitchell, Larry Carter, and Jeanne Ferrante,
                         Parallel Architectures and Compilation
                         Techniques, October 1999.

                     [2] ILP versus TLP on SMT, Nick Mitchell, Larry
                         Carter, Jeanne Ferrante, and Dean Tullsen,
                         Supercomputing, November 1999.

                     [3] Explorations in Symbiosis on Two
                         Multithreaded Architectures, Allan Snavely,
                         Nick Mitchell, Larry Carter, Jeanne Ferrante,
                         and Dean Tullsen, Workshop on Multithreaded
                         Execution and Compilation, January 1999.

                     [4] Multi-processor Performance on the Tera MTA,
                         Allan Snavely, Larry Carter, Jay Boisseau,
                         Kang Su Gatlin, Amit Majumdar, Nick Mitchell,
                         John Feo, and Brian Koblenz, Supercomputing,
                         November 1998.

                     [5] Quantifying the Multi-level Nature of Tiling
                         Interactions, Nick Mitchell, Karin H"ogstedt,
                         Larry Carter, and Jeanne Ferrante,
                         International Journal of Parallel Processing,
                         volume 26, number 6, June 1998, pages
                         641-670. 

                     [6] A Compiler Perspective on Architectural
                         Evolutions, Nick Mitchell, Larry Carter, and
                         Jeanne Ferrante, Workshop on Interactions
                         between Compilers and Computer Architectures,
                         February 1996. 

                     [7] Optical Character Recognition and Parsing of
                         Typeset Mathematics, Taku Tokuyasu, Richard
                         Fateman, Benjamin Berman, and Nick Mitchell,
                         Journal of Visual Communications and Image
                         Representations, volume 7, number 1, 1996. 
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Academic Distinctions

             1999-2000 Intel Graduate Fellowship

                  1996 MICRO fellowship, sponsored by Intel Corporation

                  9/95 Highest score on comprehensive exam

             9/94-6/95 Powell Fellowship
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Prior Research
             6/99-8/99 With Wim De Pauw, Gary Sevitsky, and Harini
                       Srinivasan, IBM TJ Watson 
                        o Augment Jinsight, a Java
                          program-understanding tool, to track values 
                        o Studied value-invariance in a set of Java applications

             6/97-9/97 With Jennifer Anderson and Jeffrey Dean, DEC
                       Western Research Lab 
                        o Integrate binary rewriting tool and
                          continuous profiling tool. 
                        o Use combination to automate data prefetching
                          in unstructured codes. 

             6/92-5/94 With Richard Fateman, UC Berkeley
                        o Design and implementation of a parser for
                          typeset mathematics. 
                        o Extend Lisp symbolic algebra system for
                          constrained calculations.