(soon to have all of the papers accessible via postscript)

ADVANCE PROGRAM and CALL FOR PARTICIPATION

Workshop on
MULTI-THREADED EXECUTION, ARCHITECTURE and COMPILATION
(MTEAC 99)
to be held in conjunction with Fifth International Symposium on
High Performance Computer Architecture (HPCA-5)
January 9 - 13, 1999 in Orlando, Florida
MTEAC99 will be a one-day workshop
held January 9, 1999, with published proceedings
 

PLEASE NOTE--THIS SCHEDULE IS TENTATIVE!

 

Tentative Schedule

8:00-8:30 Breakfast in Registration area

8:30-8:40 Opening Remarks

8:40-10:10 Session 1: Multimedia

 Simultaneous Multithreading and Multimedia
 by Heiko Oehring, Ulrich Sigmund, and Theo Ungerer
 University of Karlsruhe

 Adapting and Extending Simultaneous Multithreading for High
 Performance Video Signal Processing Applications
 by J.P. Wittenburg and P. Pirsch
 Hannover University

 Multithreaded Extensions Enhance Multimedia Performance
 by Mark Pontius and Nader Bagherzadeh
 UC Irvine

10:10-10:30 Break

10:30-11:30 Session 2: Thread Interaction

 Explorations in Symbiosis on two Multithreaded Architectures
 by Allan Snavely, Nick Mitchell, Larry Carter, Jeanne Ferrante,
 and Dean Tullsen
 UC San Diego and San Diego Supercomputer Center

 Customizable Thread Scheduling directed by Priorities
 by Yves Denneulin, Jean-Francois Mehaut, Raymond Namyst
 Institut de Mathematiques Appliquees de Grenoble,
 Ecole Normale Superieure de Lyon

11:45-12:15 Invited Talk:  Steve Keckler (title TBA)

12:15-1:30 Lunch (on your own)

1:30-3:00 Session 3: Simultaneous Multithreading

 Applications of Thread Prioritization in SMT Processors
 by Steven E. Raasch and Steven K. Reinhardt
 Michigan

 SMT Performance Gains Through Reduced Speculative Execution
 James Burns and Jean-Luc Gaudiot
 USC

 Compiler Supported Speculative Execution on SMT Processors
 A. Unger, E. Zehendner, and Th. Ungerer
 Friedrich Schiller University, University of Karlsruhe

3:00-3:20 Break

3:20-4:20 Session 4: Alternative Thread Models

 Design and Evaluation of Dynamic Load Balancing Schemes Under a
 Fine-grain Multithreaded Execution Model
 by Haiying Cai, Olivier Maquelin, Prasad Kakulavarapu, and Guang R. Gao
 McGill University, University of Delaware

 The Superstrand Model
 Andres Marquez, Kevin B. Theobald, Xinan Tang, and Guang R. Gao
 University of Delaware

4:30-5:30 Panel Session (Walid Najjar, chair.  Topic and panel members TBA)

5:30 Closing Remarks
 

 

(and, for historical interest...)

CALL FOR PAPERS

Workshop on
MULTI-THREADED EXECUTION, ARCHITECTURE and COMPILATION
(MTEAC 99)
to be held in conjunction with Fifth International Symposium on
High Performance Computer Architecture (HPCA-5)
January 9 - 13, 1999 in Orlando, Florida
MTEAC99 will be a one-day workshop
held January 9, 1999, with published proceedings
 


OBJECTIVE AND SCOPE

        Multithreaded execution is becoming a very important execution
        model in modern computers, both single and multi-processors.
        The focus of this workshop is on multithreading execution
        techniques and systems, including architecture design and
        implementation, compilation techniques, system and language
        support and performance evaluation.
 

TOPICS OF INTEREST

        Topics of interest include the execution model, architecture,
        compilation and performance evaluation of multithreaded
        systems.
 

PAPER SUBMISSIONS

        Paper submissions and reviews will be done electronically.
        Authors are requested to submit an extended abstract not to
        exceed seven pages single spaced (including references,
        figures and tables) in Postscript. Please make sure the
        document can be viewed using "ghostview" and is formatted in
        letter size (as opposed to A4). The cover page should include
        a brief abstract, a list of 5 keywords and the full address of
        the corresponding author (including surface mail address,
        telephone and fax numbers and email address).

        Email papers to mteac99@cs.ucsd.edu
 

IMPORTANT DATES
 
 
 Paper submission November 6 -- NEW DATE
Author Notification December 4
Camera-ready papers due January 1 
WORKSHOP CO-CHAIRS

     Guang Gao            University of Delaware
     Dean Tullsen         UCSD

PROGRAM COMMITTEE

Todd Austin                     Intel
Nader Bagherzadeh               UC Irvine
Preston Briggs                  Tera Computers
Larry Carter                    UCSD
Pradeep Dubey                   IBM
Jean-Luc Gaudiot                USC
Antonio Gonzalez                Universitat Politecnica de Catalunya
Jack Mills                      Intel
Walid Najjar                    Colorado State
Mario Nemirovsky                UCSC
Constantine Polychronopoulos    Illinois
Andre Seznec                    IRISA/INRIA
Josep Torellas                  Illinois
Pen-Chung Yew                   Minnesota
 

 


If you have comments or suggestions, email me at mteac99@cs.ucsd.edu